DIRSTUDY | Basic Electronics

Module 1: Semiconductor Physics

1 & 2. Covalent Bonds, Band Theory & Conductors vs. Semiconductors

Covalent Bonds: In an intrinsic (pure) semiconductor like Silicon or Germanium, each atom has 4 valence electrons. Atoms share these electrons with 4 neighboring atoms to form stable covalent bonds, creating a rigid crystal lattice.

Band Theory: When billions of atoms come together, their discrete energy levels overlap and split to form continuous "Bands".

Valence Band (VB): The highest energy band filled with bound electrons (those taking part in covalent bonds).
Conduction Band (CB): The next higher energy band. Electrons here are free to move and conduct electricity.
Forbidden Gap ($E_g$): The energy gap between VB and CB where no electrons can exist.

Conductors: VB and CB overlap ($E_g = 0$). Electrons freely move to the CB even at low temperatures. Excellent conductivity.

Semiconductors: Small forbidden gap ($E_g \approx 1.1\text{eV}$ for Si, $0.7\text{eV}$ for Ge). Acts as an insulator at 0K, but conducts at room temp.

3 & 4. Fermi Level, 0K Insulator Behavior, and Doping Levels

Fermi Level ($E_F$): The highest energy state occupied by electrons at absolute zero ($0K$). At $T > 0K$, it represents the energy level with exactly a 50% probability of being occupied by an electron.

Why are all semiconductors insulators at absolute zero ($0K$)?

At $0K$, the thermal energy ($kT$) available to the system is exactly zero. Consequently, no covalent bonds are broken. The Valence Band is completely full, and the Conduction Band is completely empty. Because there are no free electrons in the CB and no holes in the VB to carry charge, the material behaves as a perfect insulator.

Donor Level (N-Type): Created by adding Pentavalent impurities (P, As, Sb). Introduces a discrete energy level just below the CB ($E_c - 0.01\text{eV}$). It easily "donates" its 5th extra electron to the CB at room temp. $E_F$ shifts up near the CB.

Acceptor Level (P-Type): Created by adding Trivalent impurities (B, Al, Ga). Introduces a discrete energy level just above the VB ($E_v + 0.01\text{eV}$). It easily "accepts" electrons from the VB, leaving behind holes. $E_F$ shifts down near the VB.

6. Hall Effect: Derivation & High Weightage Analysis

Definition: When a current-carrying semiconductor is placed in a transverse magnetic field, an electric field (Hall voltage) is generated perpendicular to both the current and the magnetic field.

Derivation: Equilibrium of Forces
Let a semiconductor slab of width $w$ and thickness $d$ carry current $I$ (drift velocity $v_d$) in the presence of a perpendicular magnetic field $B$.

The magnetic Lorentz force on charge carrier $q$ is: $$F_m = q \cdot v_d \cdot B$$
This force deflects charges to one face of the slab, creating a transverse Hall Electric Field ($E_H$). The resulting electric force is: $$F_e = q \cdot E_H$$
At equilibrium, charge accumulation stops when the electric force perfectly balances the magnetic force: $$F_e = F_m \implies q \cdot E_H = q \cdot v_d \cdot B \implies E_H = v_d \cdot B$$
Current density $J$ is related to drift velocity by $J = nqv_d \implies v_d = \frac{J}{nq}$
Substitute $v_d$ into the equilibrium equation: $$E_H = \frac{J \cdot B}{nq}$$
We know $E_H = \frac{V_H}{w}$ (where $V_H$ is Hall Voltage) and $J = \frac{I}{A} = \frac{I}{w \cdot d}$. Substitute these: $$\frac{V_H}{w} = \frac{I \cdot B}{n \cdot q \cdot w \cdot d} \implies \mathbf{V_H = \frac{B \cdot I}{n \cdot q \cdot d}}$$
The term $\frac{1}{nq}$ is called the Hall Coefficient ($R_H$). So, $V_H = \frac{R_H \cdot B \cdot I}{d}$.

7 & 8. Einstein Relationship & Drift/Diffusion

Drift Current: Current caused by the movement of charge carriers under the influence of an externally applied Electric Field.

Diffusion Current: Current caused by the natural movement of charge carriers from a region of Higher Concentration to a region of Lower Concentration (concentration gradient), regardless of electric fields.

Einstein Relationship: $\frac{D_n}{\mu_n} = \frac{D_p}{\mu_p} = \frac{kT}{q} = V_T$

Where $D$ = Diffusion constant, $\mu$ = Mobility, $V_T$ = Thermal Voltage (~26mV at Room Temp).

Module 2: Diodes & Rectifiers

1 & 2. P-N Junction, Band Diagrams & Depletion Region

Why is the P-side energy level higher than the N-side in an unbiased junction?
Before joining, the Fermi level ($E_F$) is near the Valence Band in P-type and near the Conduction Band in N-type. When joined, the system must reach thermal equilibrium, meaning a single, constant $E_F$ across the whole device. To align the lower $E_F$ of the P-type with the higher $E_F$ of the N-type, the entire energy band structure (VB and CB) of the P-side shifts upwards relative to the N-side. This shift creates a potential hill or Barrier Potential ($V_0$).

Analysis of the Depletion Region & Immobile Ions

When the P and N materials meet, electrons diffuse from N to P, and holes diffuse from P to N.
Derivation/Reasoning for absence of mobile charges: As an electron leaves the N-side, it leaves behind a positively charged, fixed Donor Ion ($N_d^+$) locked in the crystal lattice. As a hole leaves the P-side, it leaves behind a negatively charged, fixed Acceptor Ion ($N_a^-$).

This exposes a layer of immobile space charge ions. These ions create an internal electric field directed from N to P. Mathematically, the drift current caused by this internal field perfectly cancels out the diffusion current ($J_{drift} + J_{diff} = 0$). This internal field sweeps away any mobile carriers that enter the region, completely "depleting" the area of free charge carriers.

4. Half-Wave (HW) & Full-Wave (FW) Rectifiers

A diode acts as a rectifier because it has very low resistance in forward bias (allows current) and near-infinite resistance in reverse bias (blocks current), enabling unidirectional current flow.

Half-Wave (HW) Rectifier

Operation: Conducts only during the positive half-cycle of AC.
RMS Current: $I_{rms} = \frac{I_m}{2}$
DC Current: $I_{dc} = \frac{I_m}{\pi}$
Efficiency Derivation:
$P_{dc} = I_{dc}^2 R_L = \frac{I_m^2}{\pi^2} R_L$
$P_{ac} = I_{rms}^2 (R_L+r_f) = \frac{I_m^2}{4} (R_L+r_f)$
$\eta = \frac{P_{dc}}{P_{ac}} = \frac{4}{\pi^2} \approx \mathbf{40.6\%}$
Ripple Factor ($\gamma$): 1.21 (121%)
PIV: $V_m$

HW Waveforms

Full-Wave (FW) Rectifier

Operation: Conducts during both positive and negative half-cycles (using Center-tap or Bridge).
RMS Current: $I_{rms} = \frac{I_m}{\sqrt{2}}$
DC Current: $I_{dc} = \frac{2I_m}{\pi}$
Efficiency Derivation:
$P_{dc} = I_{dc}^2 R_L = \frac{4I_m^2}{\pi^2} R_L$
$P_{ac} = I_{rms}^2 (R_L+r_f) = \frac{I_m^2}{2} (R_L+r_f)$
$\eta = \frac{P_{dc}}{P_{ac}} = \frac{8}{\pi^2} \approx \mathbf{81.2\%}$
Ripple Factor ($\gamma$): 0.48 (48%)
PIV (Center Tap): $2V_m$

FW Waveforms

7. Capacitor Filter: A capacitor is connected in parallel with the load resistor ($R_L$). During the peak of the AC wave, the capacitor charges rapidly to $V_m$. When the AC voltage drops, the capacitor slowly discharges through $R_L$, providing current to the load when the diodes are off. This "smooths" the pulsating DC output into a relatively steady DC voltage.

5. Zener Diode & Avalanche Breakdown

A Zener diode is heavily doped, resulting in a very thin depletion region. When reverse-biased, it operates in the breakdown region safely.

Zener Breakdown (Lower voltages < 6V): Due to the ultra-thin depletion region, a strong electric field physically rips electrons directly out of covalent bonds (Quantum Tunneling).
Avalanche Breakdown (Higher voltages > 6V): Minority carriers accelerate under the high reverse voltage, gaining huge kinetic energy. They collide with lattice atoms, knocking out more electrons in a multiplying "avalanche" effect.

I-V Characteristic: In reverse bias, current is tiny until $V_Z$ is reached. At $V_Z$, current shoots up drastically while voltage remains practically constant, making it ideal for Voltage Regulation.

Module 3: Bipolar Junction Transistors (BJT)

1 & 3. Configurations & Doping Principles

Standard Configurations: Common Emitter (CE - widely used, high voltage/current gain, 180° phase inversion), Common Base (CB - high frequency, unity current gain), Common Collector (CC - Emitter Follower, unity voltage gain, impedance matching).

Doping Principle & Swapping Terminals:

Emitter: Heavily doped to inject a massive number of charge carriers into the base.
Base: Very lightly doped and extremely thin to minimize carrier recombination ($I_B$ is tiny).
Collector: Moderately doped but physically the largest region to dissipate heat generated during carrier collection.

Why does the working principle fail if Emitter and Collector are interchanged?

If swapped, the new "emitter" (former collector) is only moderately doped, so it injects very few carriers. The new "collector" (former emitter) is too small to handle heat dissipation. The transistor will function, but the current gain ($\beta$) will collapse from a typical ~100 down to practically 1, rendering it useless for amplification.

4 & 6. Current Relationships & Proving $\alpha$ and $\beta$

Fundamental Current Equation: $$I_E = I_B + I_C$$

Here, $I_C \approx I_E$ (about 95-99%), and $I_B$ is very small (~1-5%).

Derivation of $\beta$ and $\alpha$ relation:

Note: Your syllabus mentions "prove $\beta = \alpha/(1+\alpha)$". This is a standard typographical error found in some materials. The mathematically correct universal relationship for BJTs is $\beta = \frac{\alpha}{1-\alpha}$. Here is the proof:

1. Start with KCL: $I_E = I_B + I_C$

2. Divide the entire equation by $I_C$:

$$\frac{I_E}{I_C} = \frac{I_B}{I_C} + 1$$

3. Use the definitions of DC current gains: $\alpha = \frac{I_C}{I_E}$ (so $\frac{I_E}{I_C} = \frac{1}{\alpha}$) and $\beta = \frac{I_C}{I_B}$ (so $\frac{I_B}{I_C} = \frac{1}{\beta}$).

4. Substitute these into the equation:

$$\frac{1}{\alpha} = \frac{1}{\beta} + 1$$

$$\frac{1}{\alpha} = \frac{1 + \beta}{\beta} \implies \mathbf{\alpha = \frac{\beta}{1 + \beta}}$$

5. To find $\beta$ in terms of $\alpha$, rearrange the same equation: $\frac{1}{\beta} = \frac{1}{\alpha} - 1 = \frac{1 - \alpha}{\alpha} \implies \mathbf{\beta = \frac{\alpha}{1 - \alpha}}$

2, 5, 7. DC Load Line, Early Effect & Reverse Saturation Current

DC Load Line & Q-Point: The Load Line is a straight line drawn on the output characteristics ($I_C$ vs $V_{CE}$) representing the equation $V_{CE} = V_{CC} - I_C R_C$. The Q-Point (Quiescent point) is the operating point with zero AC input. For undistorted amplification, the Q-Point must be exactly in the center of the active region.

Early Effect (Base-Width Modulation):
In the active region, the Collector-Base (CB) junction is reverse-biased. As you increase the reverse bias voltage ($V_{CB}$), the depletion region at the CB junction widens. Because the Base is very lightly doped compared to the Collector, this depletion region penetrates almost entirely into the Base. This effectively reduces the actual physical width of the neutral base region. This narrowing is called the Early Effect. It causes $I_C$ to increase slightly with $V_{CE}$ (giving the characteristic curves a slight upward slope instead of being perfectly flat).

Saturation Region & Early Effect: In saturation, BOTH junctions (EB and CB) are forward biased. Since the CB junction is no longer reverse biased, the depletion region shrinks, and the Early Effect completely vanishes.

Reverse Saturation Current ($I_{CBO}$): This is the leakage current flowing from Collector to Base with the Emitter open. It is highly temperature-dependent. In a CE configuration, this leakage is amplified by the transistor action, resulting in $I_{CEO} = (1+\beta)I_{CBO}$. This is why temperature stabilization is critical for BJTs.

Module 4: OP-AMP & FET

1. OP-AMP Derivations (Inverting, Non-Inverting, Integrator)

For derivations, we assume an Ideal OP-AMP: Infinite input impedance ($I_{in} = 0$) and the Virtual Ground Principle ($V_+ = V_-$).

Inverting Amplifier

Input applied to inverting terminal (-), non-inverting (+) grounded.

$V_+ = 0V$. By virtual ground, $V_- = 0V$.
Current through input resistor $R_{in}$: $I_{in} = \frac{V_{in} - V_-}{R_{in}} = \frac{V_{in}}{R_{in}}$
Current through feedback resistor $R_f$: $I_f = \frac{V_- - V_{out}}{R_f} = \frac{-V_{out}}{R_f}$
Since no current enters the OP-AMP, $I_{in} = I_f$.
$\frac{V_{in}}{R_{in}} = -\frac{V_{out}}{R_f}$

$$V_{out} = - \left( \frac{R_f}{R_{in}} \right) V_{in}$$

Non-Inverting Amplifier

Input applied to (+), feedback goes to (-).

$V_+ = V_{in}$. By virtual ground, $V_- = V_{in}$.
Current from $V_-$ to ground via $R_{in}$: $I_{in} = \frac{V_{in} - 0}{R_{in}}$
Current from $V_{out}$ to $V_-$ via $R_f$: $I_f = \frac{V_{out} - V_{in}}{R_f}$
Equating currents ($I_f = I_{in}$):
$\frac{V_{out} - V_{in}}{R_f} = \frac{V_{in}}{R_{in}} \implies V_{out} = V_{in} + V_{in}\frac{R_f}{R_{in}}$

$$V_{out} = \left( 1 + \frac{R_f}{R_{in}} \right) V_{in}$$

Integrator Amplifier

Feedback element is a Capacitor ($C_f$), input is a Resistor ($R_{in}$).

Virtual ground: $V_- = 0V$.
Input current: $I_{in} = \frac{V_{in}}{R_{in}}$
Capacitor current equation: $I_c = C_f \frac{d(V_- - V_{out})}{dt} = -C_f \frac{dV_{out}}{dt}$
Equating currents ($I_{in} = I_c$): $\frac{V_{in}}{R_{in}} = -C_f \frac{dV_{out}}{dt}$
Rearranging and integrating both sides with respect to time ($t$):

$$V_{out} = -\frac{1}{R_{in} C_f} \int_0^t V_{in} dt$$

3. FET vs BJT: Comparative Analysis

Parameter	FET (Field Effect Transistor)	BJT (Bipolar Junction Transistor)
Control Mechanism (Core Reason)	Voltage Controlled Device The voltage applied at the Gate terminal ($V_{GS}$) creates an electric field that alters the width of the depletion region in the channel. This physical pinching controls the flow of Drain current ($I_D$). Because the Gate is reverse-biased (JFET) or insulated (MOSFET), absolutely no gate current flows. Voltage solely controls output.	Current Controlled Device The physical injection of current into the Base terminal ($I_B$) allows carriers to cross into the Collector. Without Base current, Collector current stops. Input current controls output current.
Charge Carriers	Unipolar: Current is carried by ONLY majority carriers (either holes in P-channel, or electrons in N-channel).	Bipolar: Current conduction requires BOTH holes and electrons simultaneously.
Input Impedance	Extremely High ($10^9$ to $10^{14}$ $\Omega$). Draws virtually zero power from signal source.	Low (Typically around 1 k$\Omega$ to 50 k$\Omega$). Draws current from signal source.
Thermal Stability	Highly stable. Negative temperature coefficient prevents thermal runaway.	Less stable. Positive temperature coefficient makes it highly prone to thermal runaway.
Size & Fabrication	Much smaller area on silicon chip. Ideal for high-density VLSI circuits (Processors, RAM).	Larger footprint. Complex to fabricate in high density.

Electronics Engineering

🎯 Exam Format & Strategy